1 --$ XILINX$RCSfile: xccace.bsd,v $
2 --$ XILINX$Revision: 1.1 $
4 -- BSDL file for device XCCACE, package BARE_DIE
5 -- Xilinx, Inc. $State: Exp $ $Date: 2003/01/31 01:08:38 $
7 -- For technical support, http://support.xilinx.com -> enter text 'bsdl'
8 -- in the text search box at the left of the page. If none of
9 -- these records resolve your problem you should open a web support case
10 -- or contact our technical support at:
12 -- North America 1-800-255-7778 hotline@xilinx.com
13 -- United Kingdom (44) 1932 820821 ukhelp@xilinx.com
14 -- France (33) 1 3463 0100 frhelp@xilinx.com
15 -- Germany (49) 89 991 54930 dlhelp@xilinx.com
16 -- Japan (81) 3-3297-9163 jhotline@xilinx.com
21 generic (PHYSICAL_PIN_MAP : string := "BARE_DIE" );
100 CFGPROG_n : linkage bit;
106 GND : linkage bit_vector (1 to 16);
107 HVCC : linkage bit_vector (1 to 8);
108 LVCC : linkage bit_vector (1 to 8)
111 use STD_1149_1_1994.all;
113 attribute COMPONENT_CONFORMANCE of XCCACE : entity is
116 attribute PIN_MAP of XCCACE : entity is PHYSICAL_PIN_MAP;
118 constant BARE_DIE: PIN_MAP_STRING:=
201 "GND:(P9,P18,P26,P35,P46,P54,P64,P75,P83,P91,P100,P111,P120,P129,P136,P144)," &
202 "HVCC:(P1,P17,P37,P55,P73,P92,P109,P128)," &
203 "LVCC:(P10,P15,P25,P57,P84,P94,P99,P126)";
206 attribute TAP_SCAN_IN of TSTTDI : signal is true;
207 attribute TAP_SCAN_OUT of TSTTDO : signal is true;
208 attribute TAP_SCAN_MODE of TSTTMS : signal is true;
209 attribute TAP_SCAN_CLOCK of TSTTCK : signal is (16.7e06, BOTH);
211 attribute INSTRUCTION_LENGTH of XCCACE : entity is 8;
213 attribute INSTRUCTION_OPCODE of XCCACE : entity is
214 "BYPASS ( 11111111 )," &
215 "SAMPLE ( 00000001 )," &
216 "EXTEST ( 00000000 )," &
217 "IDCODE ( 00001001 )";
219 attribute INSTRUCTION_CAPTURE of XCCACE: entity is "XXXXXX01";
220 -- Bit 7 of instruction capture is CFGINSTRERR (MPU ERRORREG register bit 8)
221 -- Bit 6 is CFGFAILED (MPU ERRORREG register bit 6)
222 -- Bit 5 is CFGREADERR (MPU ERRORREG register bit 7)
223 -- Bit 4 is CFCERROR (MPU STATUSREG register bit 3)
224 -- Bit 3 is CFGERROR (MPU STATUSREG register bit 2)
225 -- Bit 2 is CFGDONE (MPU STATUSREG register bit 7).
227 attribute IDCODE_REGISTER of XCCACE: entity is
229 "1010000000000001" & -- part number
230 "00001001001" & -- manufacturer's id
231 "1"; -- required by standard
233 attribute REGISTER_ACCESS of XCCACE : entity is
234 "BYPASS ( BYPASS )," &
235 "BOUNDARY ( SAMPLE, EXTEST )," &
236 "DEVICE_ID ( IDCODE )";
238 attribute BOUNDARY_LENGTH of XCCACE : entity is 109;
240 attribute BOUNDARY_REGISTER of XCCACE : entity is
241 -- cellnum (type, port, function, safe[, ccell, disval, disrslt])
242 " 0 (BC_1, CFGINIT_n, input, X)," &
243 " 1 (BC_1, *, internal, 0)," &
244 " 2 (BC_1, CFGMODE, input, X)," &
245 " 3 (BC_1, CFGADDR2, input, X)," &
246 " 4 (BC_1, CFGADDR1, input, X)," &
247 " 5 (BC_1, CFGADDR0, input, X)," &
248 " 6 (BC_1, CFCD2_n, input, X)," &
249 " 7 (BC_1, CFCD1_n, input, X)," &
250 " 8 (BC_1, CFRDYNBSY, input, X)," &
251 " 9 (BC_1, CFWAIT_n, input, X)," &
252 " 10 (BC_1, CFOE_n, output2, X)," &
253 " 11 (BC_1, CFWE_n, output2, X)," &
254 " 12 (BC_1, CFREG_n, output2, X)," &
255 " 13 (BC_1, CFCE2_n, output2, X)," &
256 " 14 (BC_1, CFCE1_n, output2, X)," &
257 " 15 (BC_1, *, control, 0)," &
258 " 16 (BC_1, CFD15, output3, X, 15, 0, Z)," &
259 " 17 (BC_1, CFD14, output3, X, 15, 0, Z)," &
260 " 18 (BC_1, CFD13, output3, X, 15, 0, Z)," &
261 " 19 (BC_1, CFD12, output3, X, 15, 0, Z)," &
262 " 20 (BC_1, CFD11, output3, X, 15, 0, Z)," &
263 " 21 (BC_1, CFD10, output3, X, 15, 0, Z)," &
264 " 22 (BC_1, CFD9, output3, X, 15, 0, Z)," &
265 " 23 (BC_1, CFD8, output3, X, 15, 0, Z)," &
266 " 24 (BC_1, CFD7, output3, X, 15, 0, Z)," &
267 " 25 (BC_1, CFD6, output3, X, 15, 0, Z)," &
268 " 26 (BC_1, CFD5, output3, X, 15, 0, Z)," &
269 " 27 (BC_1, CFD4, output3, X, 15, 0, Z)," &
270 " 28 (BC_1, CFD3, output3, X, 15, 0, Z)," &
271 " 29 (BC_1, CFD2, output3, X, 15, 0, Z)," &
272 " 30 (BC_1, CFD1, output3, X, 15, 0, Z)," &
273 " 31 (BC_1, CFD0, output3, X, 15, 0, Z)," &
274 " 32 (BC_1, CFD15, input, X)," &
275 " 33 (BC_1, CFD14, input, X)," &
276 " 34 (BC_1, CFD13, input, X)," &
277 " 35 (BC_1, CFD12, input, X)," &
278 " 36 (BC_1, CFD11, input, X)," &
279 " 37 (BC_1, CFD10, input, X)," &
280 " 38 (BC_1, CFD9, input, X)," &
281 " 39 (BC_1, CFD8, input, X)," &
282 " 40 (BC_1, CFD7, input, X)," &
283 " 41 (BC_1, CFD6, input, X)," &
284 " 42 (BC_1, CFD5, input, X)," &
285 " 43 (BC_1, CFD4, input, X)," &
286 " 44 (BC_1, CFD3, input, X)," &
287 " 45 (BC_1, CFD2, input, X)," &
288 " 46 (BC_1, CFD1, input, X)," &
289 " 47 (BC_1, CFD0, input, X)," &
290 " 48 (BC_1, CFA10, output2, X)," &
291 " 49 (BC_1, CFA9, output2, X)," &
292 " 50 (BC_1, CFA8, output2, X)," &
293 " 51 (BC_1, CFA7, output2, X)," &
294 " 52 (BC_1, CFA6, output2, X)," &
295 " 53 (BC_1, CFA5, output2, X)," &
296 " 54 (BC_1, CFA4, output2, X)," &
297 " 55 (BC_1, CFA3, output2, X)," &
298 " 56 (BC_1, CFA2, output2, X)," &
299 " 57 (BC_1, CFA1, output2, X)," &
300 " 58 (BC_1, CFA0, output2, X)," &
301 " 59 (BC_1, *, control, 0)," &
302 " 60 (BC_1, *, control, 0)," &
303 " 61 (BC_1, MPD15, output3, X, 59, 0, Z)," &
304 " 62 (BC_1, MPD14, output3, X, 59, 0, Z)," &
305 " 63 (BC_1, MPD13, output3, X, 59, 0, Z)," &
306 " 64 (BC_1, MPD12, output3, X, 59, 0, Z)," &
307 " 65 (BC_1, MPD11, output3, X, 59, 0, Z)," &
308 " 66 (BC_1, MPD10, output3, X, 59, 0, Z)," &
309 " 67 (BC_1, MPD9, output3, X, 59, 0, Z)," &
310 " 68 (BC_1, MPD8, output3, X, 59, 0, Z)," &
311 " 69 (BC_1, MPD7, output3, X, 60, 0, Z)," &
312 " 70 (BC_1, MPD6, output3, X, 60, 0, Z)," &
313 " 71 (BC_1, MPD5, output3, X, 60, 0, Z)," &
314 " 72 (BC_1, MPD4, output3, X, 60, 0, Z)," &
315 " 73 (BC_1, MPD3, output3, X, 60, 0, Z)," &
316 " 74 (BC_1, MPD2, output3, X, 60, 0, Z)," &
317 " 75 (BC_1, MPD1, output3, X, 60, 0, Z)," &
318 " 76 (BC_1, MPD0, output3, X, 60, 0, Z)," &
319 " 77 (BC_1, MPD15, input, X)," &
320 " 78 (BC_1, MPD14, input, X)," &
321 " 79 (BC_1, MPD13, input, X)," &
322 " 80 (BC_1, MPD12, input, X)," &
323 " 81 (BC_1, MPD11, input, X)," &
324 " 82 (BC_1, MPD10, input, X)," &
325 " 83 (BC_1, MPD9, input, X)," &
326 " 84 (BC_1, MPD8, input, X)," &
327 " 85 (BC_1, MPD7, input, X)," &
328 " 86 (BC_1, MPD6, input, X)," &
329 " 87 (BC_1, MPD5, input, X)," &
330 " 88 (BC_1, MPD4, input, X)," &
331 " 89 (BC_1, MPD3, input, X)," &
332 " 90 (BC_1, MPD2, input, X)," &
333 " 91 (BC_1, MPD1, input, X)," &
334 " 92 (BC_1, MPD0, input, X)," &
335 " 93 (BC_1, MPA6, input, X)," &
336 " 94 (BC_1, MPA5, input, X)," &
337 " 95 (BC_1, MPA4, input, X)," &
338 " 96 (BC_1, MPA3, input, X)," &
339 " 97 (BC_1, MPA2, input, X)," &
340 " 98 (BC_1, MPA1, input, X)," &
341 " 99 (BC_1, MPA0, input, X)," &
342 " 100 (BC_1, MPBRDY, output2, X)," &
343 " 101 (BC_1, MPIRQ, output2, X)," &
344 " 102 (BC_1, MPOE_n, input, X)," &
345 " 103 (BC_1, MPWE_n, input, X)," &
346 " 104 (BC_1, MPCE_n, input, X)," &
347 " 105 (BC_1, ERRLED_n, output2, 1, 105, 1, WEAK1)," &
348 " 106 (BC_1, STATLED_n, output2, 1, 106, 1, WEAK1)," &
349 " 107 (BC_1, RESET_n, input, X)," &
350 " 108 (BC_1, CLK, input, X)";
351 --end boundary register