migrate verilog into ship files

[fleet.git] / src / edu / berkeley / fleet / slipway / debug.v

diff --git a/src/edu/berkeley/fleet/slipway/debug.v b/src/edu/berkeley/fleet/slipway/debug.v
index 6e64c10..30a6474 100644 (file)
--- a/src/edu/berkeley/fleet/slipway/debug.v
+++ b/src/edu/berkeley/fleet/slipway/debug.v
@@ -17,3 +17,5 @@ module debug (clk, data_debug_data_r, data_debug_data_a, data_debug_data,
   assign  data_debug_out    = data_debug_data;
 
 endmodule
+
+