29-mar

darcs-hash:20080406211813-5007d-2a796adfc5c81eac31600b41851291e816ac4ac7.gz

diff --git a/am33.tex b/am33.tex
index 18f0b22..3fd42ee 100644 (file)
--- a/am33.tex
+++ b/am33.tex
@@ -57,15 +57,15 @@ Changes:
 
 \begin{tabular}{rl}
 \color{red}
-29-Mar
+??-Apr
 \color{black}
+& noted that {\tt setFlags} can be used as {\tt nop} \\
+29-Mar
 & removed the {\tt L} flag (epilogues can now do this) \\
 & removed {\tt take\{Inner|Outer\}LoopCounter} instructions \\
 & renamed {\tt data} instruction to {\tt literal} \\
 & renamed {\tt send} instruction to {\tt move} \\
-\color{red}
 23-Mar
-\color{black}
 & added ``if its predicate is true'' to repeat count \\
 & added note that red wires do not contact ships \\
 & changed name of {\tt flags} instruction to {\tt setFlags} \\
@@ -130,13 +130,11 @@ are known as {\it tokens}, and consume less energy than data packets.
 From a programmer's perspective, a token packet is indistinguishable
 from a data packet with a unknown payload.
 
-\color{red}
 In the diagram below, the red wires carry instructions and the blue
 wires carry data; the switch fabric (gray area) carries both.  Notice
 that the red (instruction) wires do not contact the ships.  This is an
 advantage: ships are designed without any consideration for the
 instructions used to program their docks.
-\color{black}
 
 \begin{center}
 \epsfig{file=overview,width=2.5in}\\
@@ -214,8 +212,8 @@ All instruction words have the following format:
 \begin{bytefield}{37}
   \bitheader[b]{0,10,11,36}\\
 \color{black}
-  \bitbox{1}{\color{red}I\color{black}} 
-  \bitbox{1}{\color{red}OS\color{black}} 
+  \bitbox{1}{I} 
+  \bitbox{1}{OS}
   \bitbox{2}{P} 
 \color{light}
   \bitbox[tbr]{22}{} 
@@ -227,11 +225,10 @@ Each instruction word is called a {\it micro instruction}.
 Collections of one or more micro instruction are known as {\it
   composite instructions}.
 
-\color{red}
-The {\tt I} bit stands for {\tt Interruptible}\color{black}.  The \color{red}{\tt OS}
-(``One Shot'')\color{black}\ bit indicates whether or not this instruction is part
-of an outer loop.  Both of the preceding bits are explained in the
-next section.
+The {\tt I} bit stands for {\tt Interruptible}.  The {\tt OS} (``One
+Shot'') bit indicates whether or not this instruction is part of an
+outer loop.  Both of the preceding bits are explained in the next
+section.
 
 \color{black}
 
@@ -254,12 +251,12 @@ The diagram below shows an input dock for purposes of illustration
 Note the circle on the path between ``instr horn'' and ``instr fifo'';
 this is known as ``the hatch''.  The hatch has two states: sealed and
 unsealed.  When the machine powers up, the hatch is unsealed; it is
-sealed by the {\tt tail} instruction and unsealed \color{red}whenever
-the outer loop counter is set to zero (for any
-reason\footnote{\color{red}this includes {\tt OLC} being decremented
-  to zero, a {\tt setOuter} with a literal field of zero, a {\tt
-    setOuter} which copies a zero from the data register to {\tt OLC},
-  or the occurrence of a torpedo\color{black}}).\color{black}
+sealed by the {\tt tail} instruction and unsealed whenever the outer
+loop counter is set to zero (for any reason\footnote{this
+  includes {\tt OLC} being decremented to zero, a {\tt setOuter} with
+  a literal field of zero, a {\tt setOuter} which copies a zero from
+  the data register to {\tt OLC}, or the occurrence of a
+  torpedo}).
 
 When an instruction arrives at the instruction horn, it waits there
 until the hatch is in the unsealed state.  The instruction then enters
@@ -290,8 +287,6 @@ loops and outer loops are shown below:
 \end{minipage}
 \end{center}
 
-\color{red}
-
 Each type of loop has a counter associated with it: the {\tt ILC}
 counter for inner loops and the {\tt OLC} counter for outer loops.
 The inner loop counter applies only to certain ``inner-looping''
@@ -307,11 +302,9 @@ are needed to reset the outer loop counter after it becomes zero.
 However, predicated {\tt setOuter} with {\tt OS=0} is useful for
 resetting the loop counter in the middle of the execution of a loop.
 
-\color{black}
-
 \subsubsection{On Deck}
-\color{red} The
-table below lists the actions which may be taken when an
+
+The table below lists the actions which may be taken when an
 instruction arrives on deck:
 
 \begin{center}
@@ -351,9 +344,8 @@ P+$\star$ & Only if predicate is true and {\tt OLC>0} and {\tt I=1} and one of {
 \end{tabular}
 \end{center}
 
-\subsubsection{\color{red}Torpedo\color{black}}
+\subsubsection{Torpedo}
 
-\color{red}
 There is a small fifo (not shown) before the latch marked
 ``Instruction Horn''; after the {\tt tail} instruction seals the
 hatch, any subsequent instructions will queue up in this fifo until
@@ -382,8 +374,7 @@ therefore also unseals the hatch).\footnote{it is unspecified whether
 
 \subsection{Flags}
 
-The pump has \color{red}three\color{black}\ flags: {\tt A}, {\tt B},
-and {\tt S}.
+The pump has three flags: {\tt A}, {\tt B}, and {\tt S}.
 
 \begin{itemize}
 \item The {\tt A} and {\tt B} flags are general-purpose flags which
@@ -418,7 +409,7 @@ or {\tt B} flags:
 \begin{itemize}
 \item {\tt 00:} if {\tt A} is set
 \item {\tt 10:} if {\tt B} is set
-\item {\tt 01:} \color{red}TBD\color{black}
+\item {\tt 01:} TBD
 \item {\tt 11:} always
 \end{itemize}
 
@@ -426,8 +417,6 @@ or {\tt B} flags:
 \pagebreak
 \section{Instructions}
 
-\color{red}
-
 Here is a list of the instructions supported by the dock:
 
 \begin{center}
@@ -606,11 +595,7 @@ sel  & D[37:20]      & D[19:1]       \\\hline
 
 
 
-\subsection{
-\color{red}
-{\tt setFlags}
-\color{black}
-}
+\subsection{{\tt setFlags}}
 
 \setlength{\bitwidth}{5mm}
 {\tt
@@ -623,11 +608,9 @@ sel  & D[37:20]      & D[19:1]       \\\hline
 \color{black}
   \bitbox{3}{000}
   \bitbox{1}{0}
-\color{red}
   \bitbox{6}{nextA}
   \bitbox{6}{nextB}
   \bitbox{6}{nextS}
-\color{black}
 \end{bytefield}}
 
 The {\tt P} field is a predicate; if it does not hold, the instruction
@@ -653,6 +636,10 @@ set are {\tt OR}ed together, and the resulting value is assigned to
 the flag.  Note that if none of the bits are set, the value assigned
 is zero.  Note also that it is possible to produce a {\tt 1} by {\tt
   OR}ing any flag with its complement.
+\color{red}
+Note that {\tt setFlags} can be used to create a {\tt nop} (no-op) by
+setting each flag to itself.
+\color{black}
 
 
 \pagebreak
@@ -780,10 +767,8 @@ register.
 
 \subsection{{\tt tail}}
 
-\color{red}
 {\it This will probably become a bit on every instruction rather than
   its own instruction.  The only problem is that we have run out of bits in the {\tt literal} instruction.  Two possible solutions: (a) declare that {\tt literal} cannot be the last instruction in a loop or (b) because {\tt literal} instructions cannot be torpedoed anyways, re-use its {\tt I} bit for this purpose.}
-\color{black}
 
 \setlength{\bitwidth}{5mm}
 {\tt