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add new urjtag-based code, fjmem
[fleet.git] / src / edu / berkeley / fleet / fpga / ddr2 /
2009-03-07 megaczDDR2 ship: works on ML509 tree | commitdiff
2009-03-04 megaczremove synthesis attributes that xst doesnt understand tree | commitdiff
2009-03-01 megaczadd DDR2 controller, generated via MIG tree | commitdiff
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