40nm omega counter: switch design to use a timing constraint.
[fleet.git] / chips / omegaCounter / 40nm / waveform.txt
1 panel Transient
2 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
3 signal load 127,0,255
4 signal inlo[5] 255,127,0
5
6 panel Transient
7 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
8 signal onecell@5.newcell@0.firelo 255,0,0
9
10 panel Transient
11 zoom -0.1124 1.0116 2.999218750000001E-7 3.00703125E-7
12 signal net@417 0,127,255
13 signal net@419 0,235,0
14
15 panel Transient
16 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
17 signal onecell@4.newcell@0.firelo 255,0,0
18
19 panel Transient
20 zoom -0.11243750000000001 1.0119375000000002 2.999218750000001E-7 3.00703125E-7
21 signal net@414 0,127,255
22 signal net@416 0,235,0
23
24 panel Transient
25 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
26 signal onecell@3.newcell@0.firelo 255,0,0
27
28 panel Transient
29 zoom -0.1124125 1.0117125 2.999218750000001E-7 3.00703125E-7
30 signal net@410 0,127,255
31 signal net@413 0,235,0
32
33 panel Transient
34 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
35 signal onecell@2.newcell@0.firelo 255,0,0
36
37 panel Transient
38 zoom -0.11242500000000001 1.0118250000000002 2.999218750000001E-7 3.00703125E-7
39 signal net@407 0,127,255
40 signal net@409 0,235,0
41
42 panel Transient
43 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
44 signal onecell@1.newcell@0.firelo 255,0,0
45
46 panel Transient
47 zoom -0.1124125 1.0117125 2.999218750000001E-7 3.00703125E-7
48 signal net@404 0,127,255
49 signal net@406 0,235,0
50
51 panel Transient
52 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
53 signal onecell@0.newcell@0.firelo 255,0,0
54
55 panel Transient
56 zoom -0.1096375 0.9867375 2.999218750000001E-7 3.00703125E-7
57 signal net@979 0,235,0
58 signal net@1009 0,127,255
59
60 panel Transient
61 zoom -0.1125 1.0125 2.999218750000001E-7 3.00703125E-7
62 signal onecell@6.newcell@0.firelo 255,127,0
63 signal empty 0,255,255