major overhaul of FPGA code to support both ML509 and Bee2 at the same time
[fleet.git] / src / edu / berkeley / fleet / fpga / Fpga.java
2009-09-20 Adam Megaczmajor overhaul of FPGA code to support both ML509 and...
2009-08-30 Adam MegaczBreak Fpga.java into separate subclasses for ML509...
2009-08-30 Adam Megaczdo not write ucf file if fleet has no instances of...
2009-08-01 Adam Megaczadd two more Alu ships to the large configuration
2009-08-01 Adam Megaczadd a Fifo to the Fpga large configuration so the test...
2009-04-06 megaczFpga.java: update mix of ships
2009-04-06 megaczadd FpgaDestination.getPathLength() for measuring hop...
2009-03-20 megaczremove ZBT from Fpga.java
2009-03-14 megaczeliminate ShipDescription.Constant class, use BitVector...
2009-03-14 megaczfirst draft of ZBT controller
2009-03-13 megaczincrease number of Memory ships to 3 in the large confi...
2009-03-12 megaczFpga.java: update ship collections
2009-03-07 megaczmove ucf constraints into .ship files
2009-03-01 megaczadd DDR2 controller, generated via MIG
2009-01-25 megaczchange rst to high-active
2009-01-11 megaczadd commented-out versions of `drain_foo that do not...
2009-01-11 megaczeliminate need for a register for the _f flag in the...
2009-01-11 megaczdo not drain a port unless it is currently full
2009-01-11 megaczremove `flush macro, fold it into `cleanup
2008-12-30 megaczmassive overhaul of fpga code
2008-11-19 adamremove extraneous bram14.v generator
2008-11-16 adamimplement port percolation
2008-11-16 adampercolate ports for vga, ignore ddr2
2008-11-16 adamadd port percolation, use it for DRAM.ship
2008-11-10 adamclean up top-level module logic a bit
2008-11-10 adamadjust comments
2008-11-10 adamreplace DATAWIDTH with WORDWIDTH
2008-11-10 adamadjust ships to use fill/drain/full/empty macros
2008-11-10 adamfix fill/drain/full/empty macros
2008-11-10 adamremove timescale.v, bram14.v, vram.v
2008-11-04 adamadjust mix of ships for "large" configuration
2008-11-03 adamadd second and third Memory ships to the "large" config...
2008-11-03 adamchange method order in Fpga.java (inert)
2008-11-03 adammake getDestAddr() return a BitVector
2008-11-03 adamchange small Fpga configuration to have one of each...
2008-11-03 adammake HornModule and FunnelModule take an Fpga argument
2008-11-03 adamadd full/empty/drain/fill macros to Fpga.java
2008-10-27 adamremove macros
2008-10-27 adamsplit Fpga.java into two implementations, large and...
2008-10-27 adamupdate default ship configuration
2008-10-27 adammassive overhaul of fpga code
2008-09-07 adamrename Alu2->Alu
2008-09-07 adamswitch Fpga.java back to 12 lanes, add CarrySaveAdder
2008-08-22 adamadd an additional rotator and lut3 ship
2008-08-21 adammassive overhaul of fpga code
2008-06-26 adamlift sloppy getPathByAddr() implementation into FleetTw...
2008-06-26 adamremove ugly FleetTwoFleet.getUniversalSource() method
2008-06-26 adamrefactor codebag-memory-block creation code
2008-06-25 adamrelocate InstructionEncoder to FleetTwoFleet and make...
2008-06-25 adammove Verilog.java to edu.berkeley.fleet.fpga.verilog
2008-06-25 adamtotal overhaul: fleetcode-1.0 api finished
2008-02-04 adamadd Rotator ship
2008-01-30 adammore reset code
2008-01-26 adamadd rst wire (but do not do anything with it)
2008-01-25 adammajor overhaul: update dock to am33
2007-08-26 adamfinal pass to update instruction encoding; should now...
2007-08-25 adamadded working test case for send-without-destination
2007-08-25 adamchange benkobox=>pump
2007-08-23 adamunified horn for data and instructions
2007-08-20 adamsome cleanups, build fpga stuff in build/fpga, not src
2007-08-20 adammore renaming slipway=>fpga
2007-08-20 adammore renaming slipway=>fpga