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ML509: use urjtag's fjmem block as the debug controller (JtagConnectedFpga).
[fleet.git]
/
ships
/
Debug.ship
2010-01-18
Adam Megacz
ML509: use urjtag's fjmem block as the debug controller...
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commitdiff
2009-11-20
Adam Megacz
add new urjtag-based code, fjmem
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diff to current
2009-09-20
Adam Megacz
rewrite Debug.ship to include both ML509 and Bee2 support
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2009-09-19
Adam Megacz
split Debug.ship into two versions, one for ml509 and...
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2009-07-27
Adam Megacz
Debug.ship: use a BitVector, not a long
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diff to current
2009-04-06
megacz
increase serial port rate to 115200kbps
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diff to current
2009-04-06
megacz
Debug.ship: ignore break signal -- allows demos with...
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diff to current
2009-03-12
megacz
try to re-enable break line in Debug.ship (but doesnt...
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diff to current
2009-03-11
megacz
switch from using RS-232 BREAKs and no flow control...
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diff to current
2009-03-08
megacz
move gpio_led constraints from Debug into Dvi
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2009-03-07
megacz
switch from 33mhz clock to 100mhz clock
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2009-03-07
megacz
move ucf constraints into .ship files
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2009-02-28
megacz
switch host->fpga communication from 8-bit words to...
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diff to current
2009-02-28
megacz
switch fpga->host communication from 8-bit words to...
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diff to current
2009-01-25
megacz
change rst to high-active
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2009-01-11
megacz
remove `flush macro, fold it into `cleanup
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diff to current
2008-12-30
megacz
move to ml505, import Greg\'s memory controller
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diff to current
2008-12-30
megacz
remove use of uart_rts and uart_cts in ships/Debug...
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diff to current
2008-11-16
adam
implement port percolation
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2008-11-10
adam
replace DATAWIDTH with WORDWIDTH
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diff to current
2008-11-10
adam
adjust ships to use fill/drain/full/empty macros
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2008-10-27
adam
add flush support to ships
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2008-08-26
adam
update to new AM37 syntax
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2008-08-21
adam
remove macros include from Debug.ship
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2008-01-26
adam
add rst wire (but do not do anything with it)
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2007-08-28
adam
updates to many ships
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2007-08-25
adam
convert many more test cases
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diff to current
2007-08-07
adam
add test to Debug.ship
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2007-07-30
adam
cleanup, add Generator for verilog netlists
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2007-02-12
adam
change igor/archsim to fleetsim
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2007-02-12
adam
update everything to naming conventions agreed upon...
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diff to current
2007-02-12
adam
migrate verilog into ship files
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diff to current
2007-02-12
adam
add more ship files
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diff to current
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